Synthesis

1.

1. On the top navigation bar, click the Synthesize tab to transform your Verilog hardware description into a physical layout in GDSII format.
   
   
   

   2.

2. The synthesizer integrates various tools to perform the main chip design tasks, including:

• RTL Synthesis

• Equivalence Checking

• Floorplanning

• Placement

• Routing

• Timing Analysis

• Signoff Checks

• GDSII Generation

• Creates a 3d view of your project
  

3.

Note: The synthesis may take a time. Be patient and wait to finish.

4.

When the synthesis finishes, you can view the synthesis log by clicking on the “Green Tick”.