Project Summary
This project implements a RISC-V core packaged in a microcontroller, featuring the 32-bit base ISA RV32I, four simple peripherals, a 16KB RAM and a 4MB Flash controller.
This project implements a RISC-V core packaged in a microcontroller, featuring the 32-bit base ISA RV32I, four simple peripherals, a 16KB RAM and a 4MB Flash controller.
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