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Top-Level Connections

SPI Protocol

In this project, the FPGA Master and FPGA Slave are interconnected as follows: Common signal...

Updated 3 weeks ago by Admin

Blocks Used

SPI Protocol

Block Function spi_master Generates SCLK, MOSI, and CS_n; sends ...

Updated 3 weeks ago by Admin

SPI Protocol Overview

SPI Protocol

SPI (Serial Peripheral Interface) is a synchronous, full-duplex communication protocol used for h...

Updated 3 weeks ago by Admin

FPGA Synthesis and Programming

I2C Protocol

Access the Synthesis tab. Click Start Synthesis. If all items turn green, connect y...

Updated 3 weeks ago by Admin

Project Simulation

I2C Protocol

Access the Simulate tab. Click Advanced Simulation. Click Menu → Run Iverilog. ...

Updated 3 weeks ago by Admin

Assembling the Blocks in ChipInventor

I2C Protocol

Below are the connections that must be made between the blocks: Block: startAll Input: clk...

Updated 3 weeks ago by Admin

Understanding the Project Blocks

I2C Protocol

The main blocks used in this project are: Block Function startAll ...

Updated 3 weeks ago by Admin

Introduction to the I2C Protocol

I2C Protocol

The I2C (Inter-Integrated Circuit) protocol is one of the most used communication protocols in em...

Updated 3 weeks ago by Admin

Hardware Validation

UART Protocol

1. Access the Main tab. 2. Click on Serial Console. 3. Set the baud rate to 115200. 4. Send a ...

Updated 3 weeks ago by Admin

FPGA Synthesis and Programming

UART Protocol

Once the simulation is validated: 1. Go to the Synthesize tab. 2. Click Start Synthesis. 3. Co...

Updated 3 weeks ago by Admin

Connecting the Blocks

UART Protocol

Assemble the project with the following configuration: uart_rx Block Inputs: clk → system ...

Updated 3 weeks ago by Admin

Blocks Used in the Project

UART Protocol

The project uses the following blocks based on the provided Verilog modules: uart_rx: Respon...

Updated 3 weeks ago by Admin

Understanding the UART Protocol

UART Protocol

UART (Universal Asynchronous Receiver-Transmitter) is a widely used asynchronous serial communica...

Updated 3 weeks ago by Admin

How to Use the INOUT Block in ChipInventor

Inout Block

1. Introduction The INOUT block in ChipInventor allows you to configure an FPGA pin to operate b...

Updated 3 weeks ago by Admin

Synthesis and Programming the FPGA

Accelerometer Reader

After confirming your design is error-free: Click the Synthesize tab. Select Start Synt...

Updated 4 weeks ago by Admin

Project Simulation

Accelerometer Reader

Click the Simulate tab on the top menu. Select Advanced Simulation. In advanced mod...

Updated 4 weeks ago by Admin

Understanding the blocks

Accelerometer Reader

For this project, we will use four main blocks: spi_ctrl: Controls SPI communication with th...

Updated 4 weeks ago by Admin

Hardware Validation

Self Leveling Plataform - Tang Nano 9k

After programming the FPGA: 1. Assemble the physical platform with two servo motors connected to...

Updated 4 weeks ago by Admin

FPGA Synthesis and Programming

Self Leveling Plataform - Tang Nano 9k

1. Click on Synthesize. 2. Select Start Synthesis and wait until all items turn green. 3. Conne...

Updated 4 weeks ago by Admin

Project Simulation

Self Leveling Plataform - Tang Nano 9k

Before programming the FPGA, simulate your project behavior: Click on the Simulate tab. ...

Updated 4 weeks ago by Admin