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Click the Simulate tab on the top menu. Select Advanced Simulation. In advanced mode, click on Menu and then Run Iverilog. Check the message that appears: If there are no errors, your design is ready for the next step. If there a...

After confirming your design is error-free: Click the Synthesize tab. Select Start Synthesis. If all items turn green, the synthesis was successful. Connect the FPGA to your computer. Select the correct serial port, the enhanced port. ...

After programming the FPGA, let’s test the hardware: On the top menu, click Main. Access the Serial Console. Configure the correct baud rate (e.g., 115200 baud). On the serial monitor, view the data received from the accelerometer. If ...

In this tutorial, you learned how to configure and connect blocks in ChipInventor to create an SPI system for an accelerometer, check for errors in simulation, synthesize the circuit, and program the FPGA. If you have any questions, review the steps, make adj...

The objective of this project is to simulate the FPGA (Tang Primer 20K) as a HID keyboard via USB Full Speed protocol. Instead of a normal keyboard, the project takes advantage of the peripherals of the ChipInventor Devboard 2.1, such as buttons, switches and ...

This digital Braille Machine is projected using the ChipInventor platform and implemented on the Tang Primer 20K FPGA. The project utilizes 8 buttons and 2 switches of the Devboard to convert Braille combinations into standard keyboard outputs using USB HID (H...

Figure 1 – Internationally Standardise Braille dots arrangement Figure 2 – Internationally Standardise Braille alphabet and numbers Figure 3 – Input keys placement   Figure 4 – How to connect  

This project is about a motor control unit that receives the PWM duty cycle via CAN, generates a 15 kHz PWM signal, and transmits the measured motor speed over CAN every 0.05 seconds. The speed measurement is performed using an encoder (PhaseA and PhaseB) and ...

The subprojects have led0 and led1 for visual confirmation of proper CAN communication, where both must be ON when working properly. In addition, both subprojects also use 4 pins of the FPGA to be connected at the CAN Transceiver: RX, TX, Vcc and GND. The CAN ...

Figure 1 – CAN DC Motor Controller input keys placement  

This project allows users to adjust the PWM duty cycle by incrementing or decrementing it in steps using simple buttons, transmitting the duty cycle via CAN while displaying the motor's speed on a Seven Segments Display. More information in the Application No...

The subprojects have led0 and led1 for visual confirmation of proper CAN communication, where both must be ON when working properly. In addition, both subprojects also use 4 pins of the FPGA to be connected at the CAN Transceiver: RX, TX, Vcc and GND. CAN PWM ...

Figure 1 – CAN PWM Duty Cycle Selector input keys placement

Implement a rear-view camera system using the Tang Primer 20K FPGA. The project utilizes the capabilities of the ChipInventor Devboard 2.1 to process video input and display a real-time feed, assisting in vehicle reversing maneuvers.  

1. About This rear-view camera system is developed using the ChipInventor platform and implemented on the Tang Primer 20K FPGA. The project integrates a camera module as an input source, processes the video stream in real-time, and outputs the feed to a displ...

Figure 1: Connections in the FPGA Figure 2: Camera Figure 3: Camera

This project implements a 64-point FFT-based audio processing system that captures audio from an INMP441 microphone, processes it, and transmits the results via UART.  

The design uses Verilog HDL on an FPGA, leveraging a Radix-2^2 FFT algorithm with single-path delay feedback. It integrates an I2S interface for audio input, a PLL for clock generation (27 MHz to 5.4 MHz), and UART for serial communication at 115200 baud. Key ...

Figure 1: Connections in the FPGA   Figure 2:  General structure - 64-point FFT Figure 3: Processing Module Figure 4: Butterfly-shaped multiplication and addition structure

This project implements a RISC-V core packaged in a microcontroller, featuring the 32-bit base ISA RV32I, four simple peripherals, a 16KB RAM and a 4MB Flash controller.