Simulation Stage

Before programming the FPGA, it's essential to verify that your project behaves as expected in the simulation environment. This step helps catch potential logic or connection errors, saving time and avoiding issues in the physical implementation.

3.1 Accessing the Simulation Environment

Go to the Simulate tab in the top menu of ChipInventor.
Choose the simulation type based on your analysis needs:

Advanced Simulation (with VCD generation and detailed signal monitoring).
Dynamic Simulation (for real-time testing of inputs/outputs in a simplified interface).

3.2 Running the Simulation

If using Advanced Simulation, click Run Iverilog to compile and simulate the design.
Confirm that the simulation compiles without errors.
If there are any compilation issues, review your connections and block configurations before proceeding.

3.3 Signals to Monitor

Focus on analyzing the key signals that represent the critical functionalities of your system. Here are the main ones you should observe during simulation (especially when generating a VCD file for waveform analysis):

Signal	Description
encoder counter (w_7)	Should increment or decrement based on changes in quadA and quadB.
setpoint (w_3)	Should increment with each press of the key button.
error (w_5)	Difference between setpoint and encoder position; check if it makes sense.
gain outputs (w_6, w_13)	Scaled values of the error and control signals; verify proportionality.
control result (w_8)	Combined control output used to define motor behavior.
duty cycle (w_14)	8-bit signal defining PWM intensity (0-255 range).
PWM signal (w_11)	The actual pulse-width modulated signal controlling motor speed.
motor direction (w_10)	Binary signal indicating rotation direction (forward/reverse).
Outputs (IO69, IO68)	PWM signals routed according to direction (one active at a time).

3.4 Interpreting the Results

Confirm that:

The encoder counter (w_7) updates properly when you simulate encoder signals (quadA and quadB).
The setpoint counter (w_3) increases with each key press.
The error signal (w_5) responds logically as the setpoint and encoder values change.
The duty cycle (w_14) remains within 0 to 255 and adjusts as the error varies.
The direction control (w_10) changes according to whether the motor needs to move forward or backward.
Only one of the outputs (IO69 or IO68) is active at any time, consistent with the rotation direction.

3.5 Troubleshooting

If you encounter compilation errors:

Check all block connections.
Ensure no data type mismatches (e.g., 16-bit vs. 8-bit signals).

If simulation behavior is unexpected:

Review the control logic (error calculation, gain factors).
Validate the encoder signals (quadA and quadB) timing and transitions.
Confirm that debouncer outputs behave correctly on button presses.

Run the simulation as many times as necessary until the system performs as expected.