Hardware Validation

After programming the FPGA, it’s time to test the system in practice.

1. ADC Connection

• Make sure the SDA, SCL, VCC, and GND pins are properly connected between the FPGA and the external ADC.

• Verify the power supply voltage (3.3 V)

2. Potentiometer

• Connect an analog signal, that in this case is a potentiometer on the channel being read, Ch0. 

3. Buzzer 

• Attach the buzzer to the “buzzer” output pin (using a transistor or driver if needed, since some buzzers require more current than the FPGA can directly supply).

4. Testing

• Power on the board and observe:

  • • If the ADC channel value rises above ~10000, the buzzer should sound at a chosen frequency (e.g., 698 Hz), intermittently at 2 Hz.

    • If it stays below the threshold, the buzzer remains off.

5. Possible Adjustments

• If the buzzer does not sound, check the connections, power supply, and buzzer polarity/soldering.

• If the ADC reading is invalid, confirm that the SDA/SCL pin assignments are correct and that the ADC’s I2C address (the address parameter) matches your actual component.